PX4 Reference Flight Controller Design
All boards manufactured to a particular design are expected to be binary compatible (i.e. can run the same firmware). From 2018 we will offer a binary compatibility test suite that will allow us to verify and certify this compatibility.
FMU generations 1-3 were designed as open hardware, while FMU generations 4 and 5 provided only pinout and power supply specifications (schematics were created by individual manufacturers). In order to better ensure compatibility, FMUv6 and onward will return to a complete reference design model.
Reference Design Generations
- FMUv1: Development board (STM32F407, 128 KB RAM, 1MB flash, schematics) (no longer supported by PX4)
- FMUv2: Pixhawk (STM32F427, 168 MHz, 192 KB RAM, 1MB flash, schematics)
- FMUv3: Pixhawk variants with 2MB flash (3DR Pixhawk 2 (Solo), Hex Pixhawk 2.1, Holybro Pixfalcon, 3DR Pixhawk Mini, STM32F427, 168 MHz, 192 KB RAM, 2 MB flash, schematics)
- FMUv4: Pixracer (STM32F427, 168 MHz, 192 KB RAM, 2 MB flash, pinout)
- FMUv4 PRO: Drotek Pixhawk 3 PRO (STM32F467, 168 MHz, 384 KB RAM, 2 MB flash, pinout)
- FMUv5: final name TBD (STM32F7675, 200 MHz, 512 KB RAM, 2 MB flash, pinout)
- FMUv6: work in progress, final name TBD, variant 6s (STM32H7, 400 MHz, 2 MB RAM, 2 MB flash) and variant 6i (i.MX RT1050, 600 MHz, 512 KB RAM, external flash)